Dr. Kumari Nibha Priyadarshani



Dr. Kumari Nibha Priyadarshani

Assistant Professor
Department of Electronics & Communication Engineering
Motilal Nehru National Institute of Technology Allahabad, Prayagraj, India-211004
E-mail: knpriya[at]mnnit[dot]ac[dot]in
Telephone: .(O)

Research Publications


Articles

2023

  1. Priyadarshani, K. N. and Singh, S. RF and linearity distortion performance estimation of dopingless symmetric tunnel FET (DLSTFET). In International Journal of Electronics, 110 (3): 463-478, 2023.
  2. Priyadarshani, K. N.; Singh, S. and Mohammed, M. KA Dielectric/charge density modulated junctionless fet based label-free biosensor. In Inorganic Chemistry Communications, 148: 110350, 2023.
  3. Priyadarshani, K. N. and Singh, S. Ultra Sensitive Breast Cancer Cell Lines Detection Using Dual Nanocavities Engraved Junctionless FET. In IEEE Transactions on NanoBioscience, 2023.

2022

  1. Priyadarshani, K. N. and Singh, S. Double Metal Double Gate Hetero-oxide Tunnel FET: An Analytical Model. In Silicon, 14 (12): 7017-7024, 2022.
  2. Priyadarshani, K. N.; Singh, S. and Mohammed, M. KA Gate-all-around junctionless FET based label-free dielectric/charge modulation detection of SARS-CoV-2 virus. In RSC advances, 12 (15): 9202-9209, 2022.
  3. Kumar, H.; Singh, S. and Priyadarshani, K. N. Electrostatically Doped Schottky barrier tunnel field effect transistor. In International Journal of Electronics Letters, 10 (3): 333-343, 2022.

2021

  1. Kumar, H.; Singh, S.; Priyadarshani, K. N.; Ghosh, J. and Naugarhiya, A. Contact engineered charge plasma junctionless transistor for suppressing tunneling leakage. In International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 34 (1): e2812, 2021.
  2. Priyadarshani, K. N.; Singh, S. and Naugarhiya, A. RF & linearity distortion sensitivity analysis of DMG-DG-Ge pocket TFET with hetero dielectric. In Microelectronics Journal, 108: 104973, 2021.
  3. Raj, A.; Singh, S.; Priyadarshani, K. N.; Arya, R. and Naugarhiya, A. Vertically Extended Drain Double Gate S i 1- x G ex Source Tunnel FET: Proposal & Investigation For Optimized Device Performance. In Silicon, 13: 2589-2604, 2021.
  4. Priyadarshani, K. N.; Singh, S. and Naugarhiya, A. Dual metal double gate Ge-Pocket TFET (DMG-DG-Ge-Pocket TFET) with hetero dielectric: DC & analog performance projections. In Silicon: 1-12, 2021.
  5. Kumari, P.; Raj, A.; Priyadarshani, K. N. and Singh, S. Impact of temperature and interface trapped charges variation on the Analog/RF and linearity of vertically extended drain double gate Si0. 5Ge0. 5 source tunnel FET. In Microelectronics Journal, 113: 105077, 2021.
  6. Priyadarshani, K. N.; Singh, S. and Singh, K. Analog/RF performance estimation of a dopingless symmetric tunnel field effect transistor. In Journal of Electronic Materials, 50 (8): 4962-4973, 2021.
  7. Priyadarshani, K. N. and Singh, S. Ultra Sensitive Label-Free Detection of Biomolecules Using Vertically Extended Drain Double Gate Si₀. ₅Ge₀. ₅ Source Tunnel FET. In IEEE Transactions on NanoBioscience, 20 (4): 480-487, 2021.
  8. Priyadarshani, K. N.; Singh, S. and Singh, K. Ultra Steep Ge-Source Dopingless Tunnelling Field Effect Transistor with Enhanced Drive Current: DC to Linearity Characteristics Analysis. In Silicon: 1-14, 2021.

2020

  1. Priyadarshani, K. N.; Singh, S. and Singh, K. A novel self-aligned dopingless symmetric tunnel field effect transistor (DL-STFET): A process variations tolerant design. In Silicon: 1-9, 2020.

In Proceedings

2021

  1. Priyadarshani, K. N.; Singh, S. and Naugarhiya, A. Impact of Temperature on DC and Analog/RF Performance for DM-DG-Ge Pocket TFET. In Proceedings of International Conference on Communication and Artificial Intelligence: ICCAI 2020, pages 135-141, 2021.
  2. Priyadarshani, K. N. and Singh, S. Impact of Underlap/Overlap of Germanium Source Dopingless Tunnel Field Effect Transistor (Ge-S-DLTFET). In Innovations in Cyber Physical Systems: Select Proceedings of ICICPS 2020, pages 231-237, 2021.